Interrupt Handling

Each external I/O device has a corresponding (or sometimes shared) Interrupt Request Line, or IRQ

The Programmable Interrupt Controller, or PIC, is responsible for telling the CPU when an external device wishes to interrupt

The PIC then translates the IRQ to a corresponding vector number

Interrupt Descriptor Table (IDT)

An IDT is a collection of address that are referenced by vector numbers within the range of 0-255.

In each entry of the IDT, an address is stored which points to the function of the interrupt handler.

Within the IDT, vectors 0-31 are reserved for non-maskable interrupts and exceptions.

Vector number 128 is reserved for a system call (i.e. when an interrupt comes in with a vector number 128, the CPU know this is a system call, and proceeds to execute the system call routine)

Vector numbers 251 to 255 are used for Inter-process interrupt (IPI)

IDT Entry

Aside from containing the address of the interrupt handler, each entry in the IDT also contains the Current Privilege Level (CPL) and the Descriptor Privilege Level (DPL).

It has contains Gates, which describes the way we enter the kernel.

  • Task gates: Not used by Linux
  • Interrupt gates: Disables further interrupts
  • Trap gate : Further interrupts are allowed

Interrupt Handling Sequence

  1. Check vector number
  2. Get corresponding descriptor from IDT
  3. Find the specified descriptor from the GDT
  4. Check privilege levels
  5. Save eflags, cs, and eip on the stack
  6. Jump to the interrupt handler and execute
  7. On completion of interrupt handler, call iret
  8. Restore registers from the stack
  9. If returning to user mode, restore user stack
  10. Clear segment registers

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